Help/Support Found this NOW WHAT?

[Goran 1.8k]

I found this in Ida Pro, guided by LLDB, and now what???

what is exact next step in ida pro or lldb???
i need retard like explanation because am rookie...

step by step...

[Ted2 39k iPhone 13 Pro 16.0 Donor]

You don't even say what this function is supposed to be, we can only guess now.

[Goran 1.8k]

1 minute ago, Ted2 said:

You don't even say what this function is supposed to be, we can only guess now.

Coin Dozer Coins "R1 hold value"

-> 0x18e5f4:  ldr    r0, [r2, #0xc]
   0x18e5f6:  cbz    r0, 0x18e600              ; ¬¬¬¬¬ + 136463
   0x18e5f8:  mov    r1, r2

Game have ASLR

I found value in LLDB, that guided me to this in IDA PRO...

now what?
step by step... please...

[Ted2 39k iPhone 13 Pro 16.0 Donor]

Removed aslr from lldb outcome?

how do you know R1 holds the coin value?

[Goran 1.8k]

1 minute ago, Ted2 said:

Removed aslr from lldb outcome?

how do you know R1 holds the coin value?

Cuase i watched adress from iGG w s e --... and in lldb showed me... than i used register read -all
than i caltucelted adress given - ASLR, got this IDA PRO ADDRESS "0x000CE5F4"

and that adress is on picture :_)

[Ted2 39k iPhone 13 Pro 16.0 Donor]

Paste code in ur post, I can't copy functions from your image

[Goran 1.8k]

1 minute ago, Ted2 said:

Paste code in ur post, I can't copy functions from your image

__text:000CE5D2 loc_CE5D2                               ; CODE XREF: sub_CE560+54j
__text:000CE5D2                 MOV             R0, #(off_1D2383C - 0xCE5DE)
__text:000CE5DA                 ADD             R0, PC ; off_1D2383C ; Rd = Op1 + Op2
__text:000CE5DC                 LDR             R5, [R0] ; unk_1FDCE3C ; Load from Memory
__text:000CE5DE                 LDR             R0, [R5] ; Load from Memory
__text:000CE5E0                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE5E4                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE5E8                 BEQ             loc_CE5F8 ; Branch
__text:000CE5EA                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE5EC                 CBNZ            R1, loc_CE5F8 ; Compare and Branch on Non-Zero
__text:000CE5EE                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE5F2                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE5F4                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE5F8
__text:000CE5F8 loc_CE5F8                               ; CODE XREF: sub_CE560+88j
__text:000CE5F8                                         ; sub_CE560+8Cj
__text:000CE5F8                 MOVW            R0, #(:lower16:(off_1D23830 - 0xCE608)) ; Rd = Op2
__text:000CE5FC                 MOV.W           R4, #0xFFFFFFFF ; Rd = Op2
__text:000CE600                 MOVT.W          R0, #(:upper16:(off_1D23830 - 0xCE608)) ; Move Top
__text:000CE604                 ADD             R0, PC ; off_1D23830 ; Rd = Op1 + Op2
__text:000CE606                 LDR             R6, [R0] ; unk_1FDF8A0 ; Load from Memory
__text:000CE608                 MOVS            R0, #0  ; Rd = Op2
__text:000CE60A                 LDR             R1, [R6] ; Load from Memory
__text:000CE60C                 STR             R4, [SP,#0x68+var_48] ; Store to Memory
__text:000CE60E                 BL              sub_32A5A4 ; Branch with Link
__text:000CE612                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE614                 BEQ             loc_CE6CE ; Branch
__text:000CE616                 LDRB.W          R0, [R0,#0x24] ; Load from Memory
__text:000CE61A                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE61C                 BNE             loc_CE6B2 ; Branch
__text:000CE61E                 LDR             R0, [R5] ; Load from Memory
__text:000CE620                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE624                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE628                 BEQ             loc_CE638 ; Branch
__text:000CE62A                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE62C                 CBNZ            R1, loc_CE638 ; Compare and Branch on Non-Zero
__text:000CE62E                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE632                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE634                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE638
__text:000CE638 loc_CE638                               ; CODE XREF: sub_CE560+C8j
__text:000CE638                                         ; sub_CE560+CCj

What will you do step by step in this situation... thanks mate

[Ted2 39k iPhone 13 Pro 16.0 Donor]

2 minutes ago, Goran said:

__text:000CE5D2 loc_CE5D2                               ; CODE XREF: sub_CE560+54j
__text:000CE5D2                 MOV             R0, #(off_1D2383C - 0xCE5DE)
__text:000CE5DA                 ADD             R0, PC ; off_1D2383C ; Rd = Op1 + Op2
__text:000CE5DC                 LDR             R5, [R0] ; unk_1FDCE3C ; Load from Memory
__text:000CE5DE                 LDR             R0, [R5] ; Load from Memory
__text:000CE5E0                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE5E4                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE5E8                 BEQ             loc_CE5F8 ; Branch
__text:000CE5EA                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE5EC                 CBNZ            R1, loc_CE5F8 ; Compare and Branch on Non-Zero
__text:000CE5EE                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE5F2                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE5F4                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE5F8
__text:000CE5F8 loc_CE5F8                               ; CODE XREF: sub_CE560+88j
__text:000CE5F8                                         ; sub_CE560+8Cj
__text:000CE5F8                 MOVW            R0, #(:lower16:(off_1D23830 - 0xCE608)) ; Rd = Op2
__text:000CE5FC                 MOV.W           R4, #0xFFFFFFFF ; Rd = Op2
__text:000CE600                 MOVT.W          R0, #(:upper16:(off_1D23830 - 0xCE608)) ; Move Top
__text:000CE604                 ADD             R0, PC ; off_1D23830 ; Rd = Op1 + Op2
__text:000CE606                 LDR             R6, [R0] ; unk_1FDF8A0 ; Load from Memory
__text:000CE608                 MOVS            R0, #0  ; Rd = Op2
__text:000CE60A                 LDR             R1, [R6] ; Load from Memory
__text:000CE60C                 STR             R4, [SP,#0x68+var_48] ; Store to Memory
__text:000CE60E                 BL              sub_32A5A4 ; Branch with Link
__text:000CE612                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE614                 BEQ             loc_CE6CE ; Branch
__text:000CE616                 LDRB.W          R0, [R0,#0x24] ; Load from Memory
__text:000CE61A                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE61C                 BNE             loc_CE6B2 ; Branch
__text:000CE61E                 LDR             R0, [R5] ; Load from Memory
__text:000CE620                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE624                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE628                 BEQ             loc_CE638 ; Branch
__text:000CE62A                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE62C                 CBNZ            R1, loc_CE638 ; Compare and Branch on Non-Zero
__text:000CE62E                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE632                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE634                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE638
__text:000CE638 loc_CE638                               ; CODE XREF: sub_CE560+C8j
__text:000CE638                                         ; sub_CE560+CCj

What will you do step by step in this situation... thanks mate

In a code box please, I'm on phone so hard to actually read it

 

also copy from graph view, so there's no text2836362__

Updated September 4, 2017 by Ted2

[BestAndroidPlayer 1.3k iPhone 5 8]

2 minutes ago, Ted2 said:

In a code box please, I'm on phone so hard to actually read it

 

also copy from graph view, so there's no text2836362__

__text:000CE5D2 loc_CE5D2                               ; CODE XREF: sub_CE560+54j
__text:000CE5D2                 MOV             R0, #(off_1D2383C - 0xCE5DE)
__text:000CE5DA                 ADD             R0, PC ; off_1D2383C ; Rd = Op1 + Op2
__text:000CE5DC                 LDR             R5, [R0] ; unk_1FDCE3C ; Load from Memory
__text:000CE5DE                 LDR             R0, [R5] ; Load from Memory
__text:000CE5E0                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE5E4                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE5E8                 BEQ             loc_CE5F8 ; Branch
__text:000CE5EA                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE5EC                 CBNZ            R1, loc_CE5F8 ; Compare and Branch on Non-Zero
__text:000CE5EE                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE5F2                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE5F4                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE5F8
__text:000CE5F8 loc_CE5F8                               ; CODE XREF: sub_CE560+88j
__text:000CE5F8                                         ; sub_CE560+8Cj
__text:000CE5F8                 MOVW            R0, #(:lower16:(off_1D23830 - 0xCE608)) ; Rd = Op2
__text:000CE5FC                 MOV.W           R4, #0xFFFFFFFF ; Rd = Op2
__text:000CE600                 MOVT.W          R0, #(:upper16:(off_1D23830 - 0xCE608)) ; Move Top
__text:000CE604                 ADD             R0, PC ; off_1D23830 ; Rd = Op1 + Op2
__text:000CE606                 LDR             R6, [R0] ; unk_1FDF8A0 ; Load from Memory
__text:000CE608                 MOVS            R0, #0  ; Rd = Op2
__text:000CE60A                 LDR             R1, [R6] ; Load from Memory
__text:000CE60C                 STR             R4, [SP,#0x68+var_48] ; Store to Memory
__text:000CE60E                 BL              sub_32A5A4 ; Branch with Link
__text:000CE612                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE614                 BEQ             loc_CE6CE ; Branch
__text:000CE616                 LDRB.W          R0, [R0,#0x24] ; Load from Memory
__text:000CE61A                 CMP             R0, #0  ; Set cond. codes on Op1 - Op2
__text:000CE61C                 BNE             loc_CE6B2 ; Branch
__text:000CE61E                 LDR             R0, [R5] ; Load from Memory
__text:000CE620                 LDRB.W          R1, [R0,#0xB2] ; Load from Memory
__text:000CE624                 TST.W           R1, #1  ; Set cond. codes on Op1 & Op2
__text:000CE628                 BEQ             loc_CE638 ; Branch
__text:000CE62A                 LDR             R1, [R0,#0x60] ; Load from Memory
__text:000CE62C                 CBNZ            R1, loc_CE638 ; Compare and Branch on Non-Zero
__text:000CE62E                 MOV.W           R1, #0xFFFFFFFF ; Rd = Op2
__text:000CE632                 STR             R1, [SP,#0x68+var_48] ; Store to Memory
__text:000CE634                 BL.W            sub_E09B20 ; Branch with Link
__text:000CE638
__text:000CE638 loc_CE638                               ; CODE XREF: sub_CE560+C8j
__text:000CE638                                         ; sub_CE560+CCj

 

[Goran 1.8k]

loc_CE5D2                               ; CODE XREF: sub_CE560+54j
MOV             R0, #(off_1D2383C - 0xCE5DE)
ADD              R0, PC ; off_1D2383C
LDR               R5, [R0] ; unk_1FDCE3C
LDR               R0, [R5]
LDRB.W        R1, [R0,#0xB2]
TST.W           R1, #1
BEQ              loc_CE5F8
LDR               R1, [R0,#0x60]
CBNZ            R1, loc_CE5F8
MOV.W         R1, #0xFFFFFFFF
STR               R1, [SP,#0x68+var_48]
BL.W            sub_E09B20

loc_CE5F8                               ; CODE XREF: sub_CE560+88j
                                                 ; sub_CE560+8Cj
MOVW            R0, #(:lower16:(off_1D23830 - 0xCE608))
MOV.W           R4, #0xFFFFFFFF
MOVT.W         R0, #(:upper16:(off_1D23830 - 0xCE608))
ADD                R0, PC ; off_1D23830
LDR                 R6, [R0] ; unk_1FDF8A0
MOVS             R0, #0
LDR                 R1, [R6]
STR                 R4, [SP,#0x68+var_48]
BL                   sub_32A5A4
CMP               R0, #0
BEQ                loc_CE6CE
LDRB.W         R0, [R0,#0x24]
CMP               R0, #0
BNE               loc_CE6B2
LDR               R0, [R5]
LDRB.W        R1, [R0,#0xB2]
TST.W           R1, #1
BEQ              loc_CE638
LDR              R1, [R0,#0x60]
CBNZ           R1, loc_CE638
MOV.W       R1, #0xFFFFFFFF
STR              R1, [SP,#0x68+var_48]
BL.W           sub_E09B20